Cover image for System Design for Telecommunication Gateways.
System Design for Telecommunication Gateways.
Title:
System Design for Telecommunication Gateways.
Author:
Bachmutsky, Alexander.
ISBN:
9780470710753
Personal Author:
Edition:
1st ed.
Physical Description:
1 online resource (509 pages)
Contents:
SYSTEM DESIGN FOR TELECOMMUNICATION GATEWAYS -- Contents -- List of Figures -- List of Tables -- Abbreviations -- 1 Introduction -- 2 System View -- 2.1 System Architecting -- 2.2 Platform-Based Approach -- 2.3 System Verification -- 3 Hardware Technologies and Platforms -- 3.1 Different Form Factors -- 3.1.1 Proprietary 1U/2U/4U Chassis -- 3.1.2 Standard-Based Systems -- 3.1.3 IBM Blade Center -- 3.1.4 Comparison of Form Factors -- 3.2 Stacking Chassis -- 3.3 Cluster Computing -- 3.4 Inter-Blade Interconnect -- 3.4.1 Switch Fabric Technologies -- 3.4.2 Bandwidth Estimation and QoS in the Switch Fabric -- 3.4.3 Commercial Switch Fabric -- 3.5 Hardware Solutions for Data, Control and Management Planes Processing -- 3.5.1 General Purpose CPUs -- 3.5.2 FPGAs and ASICs -- 3.5.3 Network Processors -- 3.5.4 Classification Processors and Co-Processors -- 3.5.5 Content Processors -- 3.5.6 Multicore Processors -- 3.5.7 Graphic Processors -- 3.5.8 Massively Parallel Processor Array Chips -- 3.5.9 Traffic Management -- 3.5.10 Data Plane and Control Plane Scalability -- 3.5.11 Redundancy for Carrier Grade Solutions -- 4 Software Technologies and Platforms -- 4.1 Basic Software Platform -- 4.1.1 Operating Systems -- 4.1.2 Networking Stacks -- 4.2 Expanded Software Platform -- 4.2.1 Middleware -- 4.2.2 Management Plane -- 4.2.3 Deep Packet Inspection and Other Software -- 4.3 Single-Threaded and Multi-X Software Designs -- 4.3.1 Industry Opinions about Different Design Types -- 4.3.2 Single-Threaded Design -- 4.3.3 Multi-Threaded Design -- 4.3.4 Multi-Process Design -- 4.3.5 Multi-Instance Design -- 4.3.6 Co-Location and Separation of Platform and Application -- 4.3.7 Multicore Design -- 4.3.8 Fine-Grained Task-Oriented Programming Model -- 4.3.9 Multicore Performance Tuning -- 4.4 Partitioning OS and Virtualization.

4.4.1 Commercial and Open Source Embedded Hypervisor Offerings -- 4.4.2 Hypervisor Benchmarking -- References -- Trademarks -- Index.
Abstract:
ALEX BACHMUTSKY has broad experience of almost 30 years in various areas of software development, software, hardware and system architecture, technology selection and evaluation, including wireless infrastructure, security, packet processing technologies, pattern recognition, networking, high availability and multimedia. At Nokia and later at Nokia Siemens Networks (NSN), Alex has been a Chief Architect for state-of-the-art high performance telecommunication gateways, from multi-chassis and multi-blade systems to pizza-box type devices integrating the latest available packet processing and system architectures. As a part of the Research and Technology Platform organization at NSN, he is continuously scouting for the newest and most promising hardware and software technologies, while actively influencing the next generation development of components and sub-systems in the area of high performance and highly scalable carrier grade data and control plane processing. The knowledge collected during this technology intelligence and evaluation work, together with extensive system design experience, became a foundation for this book.
Local Note:
Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2017. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries.
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