Cover -- Title Page -- Copyright -- Contents -- Acknowledgments -- General Introduction -- Part 1. Silion Nanowire Biochemical Sensors -- Part 1. Introduction -- Chapter 1. Fabrication Of Nanowires -- 1.1. Introduction -- 1.2. Silicon nanowire fabrication with electron beam lithography -- 1.2.1. Key requirements -- 1.2.2. Why electron beam lithography? -- 1.2.3. Lithographic requirements -- 1.2.4. Tools, resist materials and development processes -- 1.2.5. Exposure strategies and proximity effect correction -- 1.2.6. Technology limitations and how to circumvent them -- 1.3. Silicon nanowire fabrication with sidewall transfer lithography -- 1.4. Si nanonet fabrication -- 1.4.1. Si NWs fabrication -- 1.4.2. Si nanonet assembling -- 1.4.3. Si nanonet morphology and properties -- 1.5. Acknowledgments -- 1.6. Bibliography -- Chapter 2. Functionalization Of Si-Based NW FETs For DNA Detection -- 2.1. Introduction -- 2.2. Functionalization process -- 2.3. Functionalization of Si nanonets for DNA biosensing -- 2.3.1. Detection of DNA hybridization on the Si nanonet by fluorescence microscopy -- 2.3.2. Preliminary electrical characterizations of NW networks -- 2.4. Functionalization of SiC nanowire-based sensor for electrical DNA biosensing -- 2.4.1. SiC nanowire-based sensor functionalization process -- 2.4.2. DNA electrical detection from SiC nanowire-based sensor -- 2.5. Acknowledgments -- 2.6. Bibliography -- Chapter 3. Sensitivity Of Silicon Nanowire Biochemical Sensors -- 3.1. Introduction -- 3.1.1. Definitions -- 3.1.2. Main parameters affecting the sensitivity -- 3.2. Sensitivity and noise -- 3.3. Modeling the sensitivity of Si NW biosensors -- 3.3.1. Modeling the electrolyte -- 3.4. Sensitivity of random arrays of 1D nanostructures -- 3.4.1. Electrical characterization.

3.4.2. Low-frequency noise characterization -- 3.4.3. Simulation of electron conduction in random networks of 1D nanostructures -- 3.4.4. Discussion -- 3.5. Conclusions -- 3.6. Acknowledgments -- 3.7. Bibliography -- Chapter 4. Integration Of Silicon Nanowires With CMOS -- 4.1. Introduction -- 4.2. Overview of CMOS process technology -- 4.3. Integration of silicon nanowire after BEOL -- 4.4. Integration of silicon nanowires in FEOL -- 4.5. Sensor architecture design -- 4.6. Conclusions -- 4.7. Bibliography -- Chapter 5. Portable, Integrated Lock-In-Amplifier-Based System For Real-Time Impedimetric Measurements On Nanowires Biosensors -- 5.1. Introduction -- 5.2. Portable stand-alone system -- 5.3. Integrated impedimetric interface -- 5.4. Impedimetric measurements on nanowire sensors -- 5.5. Bibliography -- Part 2. New Materials, Devices And Technologies For Energy Harvesting -- Part 2. Introduction -- Chapter 6. Vibrational Energy Harvesting -- 6.1. Introduction -- 6.2. Piezoelectric energy transducer -- 6.2.1. Introduction -- 6.2.2. State-of-the-art devices and materials -- 6.2.3. MEMS piezoelectric vibration energy harvesting transducers -- 6.2.4. RMEMS prototypes characterization and discussions of experimental results -- 6.2.5. Near field characterization techniques -- 6.2.6. Dedicated electro-mechanical models for piezoelectric transducer design -- 6.3. Electromagnetic energy transducers -- 6.3.1. Introduction -- 6.3.2. State-of-the-art devices and materials -- 6.3.3. Vibration energy harvester exploiting both the piezoelectric and electromagnetic effect -- 6.3.4. Device design -- 6.4. Bibliography -- Chapter 7. Thermal Energy Harvesting -- 7.1. Introduction -- 7.1.1. Basics of thermoelectric conversion -- 7.1.2. Strategies to increase ZT -- 7.1.3. Heavy-metal-free TE generation.

7.1.4. Alternatives to TE harvesting for self-powered solid-state microsystems -- 7.2. Thermal transport at nanoscale -- 7.2.1. Brief review of nanoscale thermal conductivity -- 7.2.2. The effect of phonon confinement -- 7.2.3. Fabrication of ultrathin free-standing silicon membranes -- 7.2.4. Advanced methods of characterizing phonon dispersion, lifetimes and thermal conductivity -- 7.3. Porous silicon for thermal insulation on silicon wafers -- 7.3.1. Introduction -- 7.3.2. Thermal conductivity of nanostructured porous Si -- 7.3.3. Thermal isolation using thick porous Si layers -- 7.3.4. Thermoelectric generator using porous Si thermal isolation -- 7.4. Spin dependent thermoelectric effects -- 7.4.1. Physical principle and interest for thermal energy harvesting -- 7.4.2. Demonstration of the magnon drag effect -- 7.5. Composites of thermal shape memory alloy and piezoelectric materials -- 7.5.1. Introduction -- 7.5.2. Physical principle and interest for thermal energy harvesting -- 7.5.3. Novelty and realizations -- 7.5.4. Theoretical considerations -- 7.5.5. Examples of use -- 7.5.6. Summary of composite harvesting by the combination of SMA and piezoelectric materials -- 7.6. Conclusions -- 7.7. Bibliography -- Chapter 8. Nanowire Based Solar Cells -- 8.1 Introduction -- 8.2. Design of NW-based solar cells -- 8.2.1. Geometrical optimization of NW-based solar cells by numerical simulations -- 8.2.2. TCAD simulation of NW-based solar cells -- 8.3. Fabrication and opto-electrical characterization of NW-based solar cells -- 8.3.1. Elaboration of NW-based solar cells -- 8.3.2. Opto-electrical characterization of NW-based solar cells -- 8.4 Conclusion -- 8.5 Acknowledgments -- 8.6 Bibliography -- Chapter 9. Smart Energy Management And Conversion -- 9.1. Introduction.

9.2. Power management solutions for energy harvesting devices -- 9.2.1. Ultra-low voltage thermoelectric energy harvesting -- 9.2.2. Sub-1mW photovoltaic energy harvesting -- 9.2.3. Piezoelectric and micro-electromagnetic energy harvesting -- 9.2.4. DC/DC power management for future micro-generator -- 9.3. Sub-mW energy storage solutions -- 9.4. Conclusions -- 9.5. Bibliography -- Part 3. On-Chip Electronic Cooling -- Chapter 10. Tunnel Junction Electronic Coolers -- 10.1. Introduction and motivation -- 10.1.1. Existing cryogenic technology -- 10.2. Tunneling junctions as coolers -- 10.2.1. The NIS junction -- 10.2.2. Cooling power -- 10.2.3. Thermometry -- 10.2.4. The superconductor-insulator-normal metal-insulator-superconductor (SINIS) structure -- 10.2.5. Double junction superconductor-silicon-superconductor (SSmS) cooler -- 10.3. Limitations to cooling -- 10.3.1. States within the superconductor gap -- 10.3.2. Joule heating -- 10.3.3. Series resistance -- 10.3.4. Quasi-particle-related heating -- 10.3.5. Andreev reflection -- 10.4. Heavy fermion-based coolers -- 10.5. Summary -- 10.6. Bibliography -- Chapter 11. Silicon-Based Cooling Elements -- 11.1. Introduction to semiconductor-superconductor tunnel junction coolers -- 11.2. Silicon-based Schottky barrier junctions -- 11.3. Carrier-phonon coupling in strained silicon -- 11.3.1. Measurement of electron-phonon coupling constant -- 11.4. Strained silicon Schottky barrier mK coolers -- 11.5. Silicon mK coolers with an oxide barrier [GUN 13] -- 11.5.1. Reduction of sub-gap leakage -- 11.5.2. Effects of strain -- 11.6. The silicon cold electron bolometer -- 11.7. Integration of detector and electronics -- 11.8. Summary and future prospects -- 11.9. Acknowledgments -- 11.10 Bibliography.

Chapter 12. Thermal Isolation Through Nanostructuring -- 12.1. Introduction -- 12.2. Lattice cooling by physical nanostructuring -- 12.3. Porous Si membranes as cryogenic thermal isolation platforms -- 12.3.1. Porous Si micro-coldplates -- 12.3.2. Porous Si thermal conductivity -- 12.4. Crystalline membrane platforms -- 12.4.1. Strained germanium membranes -- 12.4.2. Thermal conductance measurements in Si and Ge membranes -- 12.4.3. Epitaxy-compatible thermal isolation platform -- 12.5. Summary of thermal conductance measurements -- 12.6. Acknowledgments -- 12.7. Bibliography -- Part 4. New Materials, Devices And Technologies For RF Applications -- Part 4. Introduction -- Chapter 13. Substrate Technologies For Silicon-Integrated RF and mm-Wave Passive Devices -- 13.1. Introduction -- 13.2. High-resistivity Si substrate for RF -- 13.2.1. Losses along coplanar waveguide transmission lines -- 13.2.2. Crosstalk -- 13.2.3. Nonlinearities along CPW lines -- 13.3. Porous Si substrate technology -- 13.3.1. General properties of porous Si -- 13.3.2. Dielectric properties of porous Si -- 13.3.3. Broadband electrical characterization of CPWT Lines on porous Si -- 13.3.4. Inductors on porous Si -- 13.3.5. Antennas on porous Si -- 13.4. Comparison between HR Si and local porous Si substrate technologies -- 13.4.1. Comparison of similar CPW TLines on different substrates -- 13.4.2. Comparison of inductors on different RF substrates -- 13.5. Design of slow-wave CPWs and filters on porous silicon -- 13.5.1. Slow-wave CPW TLines on porous Si -- 13.5.2. Simulation results for S-CPW TLines -- 13.5.3. Stepped impedance low-pass filter on porous silicon -- 13.5.4. Simulation results for filters -- 13.6. Conclusion -- 13.7. Acknowledgments -- 13.8. Bibliography.

Chapter 14. Metal Nanolines And Antennas For RF and mm-Wave Applications.