Cover image for Networks on chips technology and tools
Networks on chips technology and tools
Title:
Networks on chips technology and tools
Author:
Benini, Luca, 1967-
ISBN:
9780123705211
Personal Author:
Publication Information:
Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, c2006.
Physical Description:
x, 395 p. : ill. ; 25 cm.
Series:
The Morgan Kaufmann series in systems on silicon
Series Title:
The Morgan Kaufmann series in systems on silicon
Contents:
I. Introduction and Motivation -- II. Architectures for NoCs -- III. Physical network layer -- IV. Data-link layer and encoding -- V. Switching and Routing in NoCs -- VI. Software for NoCs -- VII. Tools for NoC Design -- VIII. On-Chip multiprocessors -- IX. SoCs based on NoCs -- Examples of other design chips using NoCs.
Abstract:
The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs.
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