Front cover -- Title page -- Copyright page -- Table of Contents -- Preface -- About This Book -- About the Other Book -- Changes for the Third Edition -- Instructor Support -- Concluding Remarks -- Acknowledgments for the Third Edition -- 1 Computer Abstractions and Technology -- 1.1 Introduction -- Classes of Computing Applications and Their Characteristics -- What You Can Learn in This Book -- 1.2 Below Your Program -- From a High-Level Language to the Language of Hardware -- 1.3 Under the Covers -- Anatomy of a Mouse -- Through the Looking Glass -- Opening the Box -- A Safe Place for Data -- Communicating with Other Computers -- Technologies for Building Processors and Memory -- 1.4 Real Stuff: Manufacturing Pentium 4 Chips -- 1.5 Fallacies and Pitfalls -- Road Map for This Book -- 1.6 Concluding Remarks -- 1.7 Historical Perspective and Further Reading -- 1.8 Exercises -- Computers in the Real World -- 2 Instructions: Language of the Computer -- 2.1 Introduction -- 2.2 Operations of the Computer Hardware -- 2.3 Operands of the Computer Hardware -- Memory Operands -- Constant or Immediate Operands -- 2.4 Representing Instructions in the Computer -- MIPS Fields -- 2.5 Logical Operations -- 2.6 Instructions for Making Decisions -- Loops -- Case/Switch Statement -- 2.7 Supporting Procedures in Computer Hardware -- Using More Registers -- Nested Procedures -- Allocating Space for New Data on the Stack -- Allocating Space for New Data on the Heap -- 2.8 Communicating with People -- Characters and Strings in Java -- 32-Bit Immediate Operands -- 2.9 MIPS Addressing for 32-Bit Immediates and Addresses -- Addressing in Branches and Jumps -- MIPS Addressing Mode Summary -- Decoding Machine Language -- 2.10 Translating and Starting a Program -- Compiler -- Assembler -- Linker -- Loader -- Dynamically Linked Libraries -- Starting a Java Program.

High-Level Optimizations -- 2.11 How Compilers Optimize -- Local and Global Optimizations -- 2.12 How Compilers Work: An Introduction -- 2.13 A C Sort Example to Put It All Together -- The Procedure -- Array Version of Clear -- 2.14 Implementing an Object-Oriented Language -- 2.15 Arrays versus Pointers -- Pointer Version of Clear -- Comparing the Two Versions of Clear -- 2.16 Real Stuff: IA-32 Instructions -- The Intel IA-32 -- IA-32 Integer Operations -- IA-32 Instruction Encoding -- IA-32 Conclusion -- 2.17 Fallacies and Pitfalls -- 2.18 Concluding Remarks -- 2.19 Historical Perspective and Further Reading -- 2.20 Exercises -- Computers in the Real World -- 3 Arithmetic for Computers -- 3.1 Introduction -- 3.2 Signed and Unsigned Numbers -- Summary -- 3.3 Addition and Subtraction -- Summary -- 3.4 Multiplication -- Sequential Version of the Multiplication Algorithm and Hardware -- Signed Multiplication -- Faster Multiplication -- Multiply in MIPS -- Summary -- 3.5 Division -- A Division Algorithm and Hardware -- Signed Division -- Faster Division -- Divide in MIPS -- Summary -- 3.6 Floating Point -- Floating-Point Representation -- Floating-Point Addition -- Floating-Point Multiplication -- Floating-Point Instructions in MIPS -- Accurate Arithmetic -- Summary -- 3.7 Real Stuff: Floating Point in the IA-32 -- The IA-32 Floating-Point Architecture -- The Intel Streaming SIMD Extension 2 (SSE2) Floating-Point Architecture -- 3.8 Fallacies and Pitfalls -- 3.9 Concluding Remarks -- 3.10 Historical Perspective and Further Reading -- 3.11 Exercises -- Computers in the Real World -- 4 Assessing and Understanding Performance -- 4.1 Introduction -- Defining Performance -- Measuring Performance -- 4.2 CPU Performance and Its Factors -- 4.3 Evaluating Performance -- Comparing and Summarizing Performance -- Total Execution Time: A Consistent Summary Measure.

Performance with SPEC CPU Benchmarks -- 4.4 Real Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors -- SPECweb99: A Throughput Benchmark for Web Servers -- Performance, Power, and Energy Efficiency -- 4.5 Fallacies and Pitfalls -- 4.6 Concluding Remarks -- 4.7 Historical Perspective and Further Reading -- 4.8 Exercises -- Computers in the Real World -- 5 The Processor: Datapath and Control -- 5.1 Introduction -- A Basic MIPS Implementation -- 5.2 Logic Design Conventions -- 5.3 Building a Datapath -- Creating a Single Datapath -- 5.4 A Simple Implementation Scheme -- The ALU Control -- Designing the Main Control Unit -- Why a Single-Cycle Implementation Is Not Used Today -- 5.5 A Multicycle Implementation -- Breaking the Instruction Execution into Clock Cycles -- Defining the Control -- 5.6 Exceptions -- How Exceptions Are Handled -- How Control Checks for Exceptions -- 5.7 Microprogramming: Simplifying Control Design -- 5.8 An Introduction to Digital Design Using a Hardware Design Language -- Challenges Implementing More Complex Architectures -- 5.9 Real Stuff: The Organization of Recent Pentium Implementations -- The Structure of the Pentium 4 Implementation -- 5.10 Fallacies and Pitfalls -- 5.11 Concluding Remarks -- 5.12 Historical Perspective and Further Reading -- 5.13 Exercises -- Computers in the Real World -- 6 Enhancing Performance with Pipelining -- 6.1 An Overview of Pipelining -- Designing Instruction Sets for Pipelining -- Pipeline Hazards -- Pipeline Overview Summary -- 6.2 A Pipelined Datapath -- Graphically Representing Pipelines -- 6.3 Pipelined Control -- 6.4 Data Hazards and Forwarding -- 6.5 Data Hazards and Stalls -- 6.6 Control Hazards -- Assume Branch Not Taken -- Reducing the Delay of Branches -- Dynamic Branch Prediction -- Pipeline Summary.

6.7 Using a Hardware Description Language to Describe and Model a Pipeline -- 6.8 Exceptions -- 6.9 Advanced Pipelining: Extracting More Performance -- The Concept of Speculation -- Static Multiple Issue -- Dynamic Multiple-Issue Processors -- 6.10 Real Stuff: The Pentium 4 Pipeline -- 6.11 Fallacies and Pitfalls -- 6.12 Concluding Remarks -- 6.13 Historical Perspective and Further Reading -- 6.14 Exercises -- Computers in the Real World -- 7 Large and Fast: Exploiting Memory Hierarchy -- 7.1 Introduction -- 7.2 The Basics of Caches -- Accessing a Cache -- Handling Cache Misses -- Handling Writes -- An Example Cache: The Intrinsity FastMATH Processor -- Designing the Memory System to Support Caches -- Summary -- 7.3 Measuring and Improving Cache Performance -- Reducing Cache Misses by More Flexible Placement of Blocks -- Locating a Block in the Cache -- Choosing Which Block to Replace -- Reducing the Miss Penalty Using Multilevel Caches -- Check Yourself -- Summary -- 7.4 Virtual Memory -- Placing a Page and Finding It Again -- Page Faults -- What about Writes? -- Making Address Translation Fast: The TLB -- Integrating Virtual Memory, TLBs, and Caches -- Implementing Protection with Virtual Memory -- Handling TLB Misses and Page Faults -- Summary -- Question 1: Where Can a Block Be Placed? -- 7.5 A Common Framework for Memory Hierarchies -- Question 2: How Is a Block Found? -- Question 3: Which Block Should Be Replaced on a Cache Miss? -- Question 4: What Happens on a Write? -- The Three Cs: An Intuitive Model for Understanding the Behavior of Memory Hierarchies -- Check Yourself -- 7.6 Real Stuff: The Pentium P4 and the AMD Opteron Memory Hierarchies -- The Memory Hierarchies of the P4 and Opteron -- Techniques to Reduce Miss Penalties -- 7.7 Fallacies and Pitfalls -- 7.8 Concluding Remarks -- Recent Trends.

7.9 Historical Perspective and Further Reading -- 7.10 Exercises -- Answers to Check Yourself -- Computers in the Real World -- 8 Storage, Networks, and Other Peripherals -- 8.1 Introduction -- 8.2 Disk Storage and Dependability -- Dependability, Reliability, and Availability -- RAID -- 8.3 Networks -- Bus Basics -- 8.4 Buses and Other Connections between Processors, Memory, and I/O Devices -- The Buses and Networks of the Pentium 4 -- 8.5 Interfacing I/O Devices to the Processor, Memory, and Operating System -- Giving Commands to I/O Devices -- Communicating with the Processor -- Interrupt Priority Levels -- Transferring the Data between a Device and Memory -- Direct Memory Access and the Memory System -- 8.6 I/O Performance Measures: Examples from Disk and File Systems -- Transaction Processing I/O Benchmarks -- File System and Web I/O Benchmarks -- I/O Performance versus Processor Performance -- 8.7 Designing an I/O System -- 8.8 Real Stuff: A Digital Camera -- 8.9 Fallacies and Pitfalls -- 8.10 Concluding Remarks -- 8.11 Historical Perspective and Further Reading -- 8.12 Exercises -- Computers in the Real World -- Appendix A Assemblers, Linkers, and the SPIM Simulator -- A.1 Introduction -- When to Use Assembly Language -- Drawbacks of Assembly Language -- A.2 Assemblers -- Object File Format -- Additional Facilities -- A.3 Linkers -- A.4 Loading -- A.5 Memory Usage -- A.6 Procedure Call Convention -- Procedure Calls -- Procedure Call Example -- Another Procedure Call Example -- A.7 Exceptions and Interrupts -- A.8 Input and Output -- Simulation of a Virtual Machine -- A.9 SPIM -- Getting Started with SPIM -- Surprising Features -- Byte Order -- System Calls -- Addressing Modes -- A.10 MIPS R2000 Assembly Language -- Assembler Syntax -- Encoding MIPS Instructions -- Instruction Format -- Arithmetic and Logical Instructions.

Constant-Manipulating Instructions.