Specification, Design, and Verification Methods -- PSL-Based Online Monitoring of Digital Systems -- Refining Synchronous Communication onto Network-on-Chip Best-Effort Services -- C/C++-Based System Design -- Behaviour Separation: A High-Level Methodology Applicable in the SystemC Environment -- Mixing Synchronous Reactive and Untimed MoCs in SystemC -- Interface-Centric Abstraction Level for Rapid Hardware/Software Integration -- Efficient and Customizable Integration of Temporal Properties into SystemC -- UMoC++: A C++-Based Multi-MoC Modeling Environment -- Analog, Mixed-Signal, and Heterogeneous System Design -- Creating Virtual Prototypes of Complex MEMS Transducers Using Reduced-Order Modelling Methods and VHDL-AMS -- Modeling Uncertainty in Nonlinear Analog Systems with Affine Arithmetic -- SystemC-WMS: Mixed-Signal Simulation Based on Wave Exchanges -- Automatic Generation of a Coverification Platform -- UML/XML-Based Approach to Hierarchical AMS Synthesis -- UML-Based System Specification and Design -- Compiled and Synthesized UML -- Property-Preservation Synthesis for Unified Control- and Data-Oriented Models -- Traceability and Interoperability at Different Levels of Abstraction in Model-Driven Engineering -- Power Simulation of Communication Protocols with StateC -- Integrating Model-Checking with UML-Based SoC Development.