Architectures -- Extra-dimensional Island-Style FPGAs -- A Tightly Coupled VLIW/Reconfigurable Matrix and its Modulo Scheduling Technique -- Stream-based XPP Architectures in Adaptive System-on-Chip Integration -- Core-Based Architecture for Data Transfer Control in SoC Design -- Customizable and Reduced Hardware Motion Estimation Processors -- Methodologies and Tools -- Enabling Run-time Task Relocation on Reconfigurable Systems -- A Unified Codesign Environment -- Mapping Applications to a Coarse Grain Reconfigurable System -- Compilation and Temporal Partitioning for a Coarse-grain Reconfigurable Architecture -- Run-time Defragmentation for Dynamically Reconfigurable Hardware -- Virtual Hardware Byte Code as a Design Platform for Reconfigurable Embedded Systems -- A Low Energy Data Management for Multi-Context Reconfigurable Architectures -- Dynamic and Partial Reconfiguration in FPGA SoCs: Requirements Tools and a Case Study -- Applications -- Design Flow for a Reconfigurable Processor -- IPsec-Protected Transport of HDTV over IP -- Fast, Large-scale String Match for a 10 Gbps FPGA-based NIDS -- Architecture and FPGA Implementation of a Digit-serial RSA Processor -- Division in GF(p) for Application in Elliptic Curve Cryptosystems on Field Programmable Logic -- A New Arithmetic Unit in GF(2M) for Reconfigurable Hardware Implementation -- Performance Analysis of SHACAL-1 Encryption Hardware Architectures -- Security Aspects of FPGAs in Cryptographic Applications -- Bioinspired Stimulus Encoder for Cortical Visual Neuroprostheses -- A Smith-Waterman Systolic Cell -- The Effects of Polynomial Degrees.