Search Results for - Narrowed by: IYTE Library - 2006 - Computer aided design.SirsiDynix Enterprisehttps://catalog.iyte.edu.tr/client/en_US/default/default/qf$003dLIBRARY$002509Library$0025091$00253AIYTE$002509IYTE$002bLibrary$0026qf$003dPUBDATE$002509Publication$002bDate$0025092006$0025092006$0026qf$003dSUBJECT$002509Subject$002509Computer$002baided$002bdesign.$002509Computer$002baided$002bdesign.$0026ps$003d300?2024-06-20T06:50:05ZSemiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrityent://SD_ILS/0/SD_ILS:5042732024-06-20T06:50:05Z2024-06-20T06:50:05Zby Leventhal, Roy G. author.<br/><a href="http://dx.doi.org/10.1007/b104647">http://dx.doi.org/10.1007/b104647</a><br/>Format: Electronic Resources<br/>Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibilityent://SD_ILS/0/SD_ILS:5045452024-06-20T06:50:05Z2024-06-20T06:50:05Zby Ben Dhia, Sonia. editor.<br/><a href="http://dx.doi.org/10.1007/b137864">http://dx.doi.org/10.1007/b137864</a><br/>Format: Electronic Resources<br/>Embedded System Designent://SD_ILS/0/SD_ILS:5049672024-06-20T06:50:05Z2024-06-20T06:50:05Zby Marwedel, Peter. author.<br/><a href="http://dx.doi.org/10.1007/0-387-30087-2">http://dx.doi.org/10.1007/0-387-30087-2</a><br/>Format: Electronic Resources<br/>Leakage in Nanometer CMOS Technologiesent://SD_ILS/0/SD_ILS:5047372024-06-20T06:50:05Z2024-06-20T06:50:05Zby Narendra, Siva G. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28133-9">http://dx.doi.org/10.1007/0-387-28133-9</a><br/>Format: Electronic Resources<br/>Rapid Prototyping of Digital Systemsent://SD_ILS/0/SD_ILS:5048552024-06-20T06:50:05Z2024-06-20T06:50:05Zby Hamblen, James O. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28965-8">http://dx.doi.org/10.1007/0-387-28965-8</a><br/>Format: Electronic Resources<br/>SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modelingent://SD_ILS/0/SD_ILS:5054242024-06-20T06:50:05Z2024-06-20T06:50:05Zby Sutherland, Stuart. author.<br/><a href="http://dx.doi.org/10.1007/0-387-36495-1">http://dx.doi.org/10.1007/0-387-36495-1</a><br/>Format: Electronic Resources<br/>Verification Methodology Manual for SystemVerilogent://SD_ILS/0/SD_ILS:5044112024-06-20T06:50:05Z2024-06-20T06:50:05Zby Bergeron, Janick. author.<br/><a href="http://dx.doi.org/10.1007/b135575">http://dx.doi.org/10.1007/b135575</a><br/>Format: Electronic Resources<br/>Thermal and Power Management of Integrated Circuitsent://SD_ILS/0/SD_ILS:5049422024-06-20T06:50:05Z2024-06-20T06:50:05Zby Vassighi, Arman. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29749-9">http://dx.doi.org/10.1007/0-387-29749-9</a><br/>Format: Electronic Resources<br/>Scalable Hardware Verification with Symbolic Simulationent://SD_ILS/0/SD_ILS:5049572024-06-20T06:50:05Z2024-06-20T06:50:05Zby Bertacco, Valeria. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29906-8">http://dx.doi.org/10.1007/0-387-29906-8</a><br/>Format: Electronic Resources<br/>Constraint-Based Verificationent://SD_ILS/0/SD_ILS:5050262024-06-20T06:50:05Z2024-06-20T06:50:05Zby Yuan, Jun. author.<br/><a href="http://dx.doi.org/10.1007/0-387-30784-2">http://dx.doi.org/10.1007/0-387-30784-2</a><br/>Format: Electronic Resources<br/>Writing Testbenches using System Verilogent://SD_ILS/0/SD_ILS:5050752024-06-20T06:50:05Z2024-06-20T06:50:05Zby Bergeron, Janick. author.<br/><a href="http://dx.doi.org/10.1007/0-387-31275-7">http://dx.doi.org/10.1007/0-387-31275-7</a><br/>Format: Electronic Resources<br/>Systemverilog for Verification A Guide to Learning the Testbench Language Featuresent://SD_ILS/0/SD_ILS:5045712024-06-20T06:50:05Z2024-06-20T06:50:05Zby Spear, Chris. author.<br/><a href="http://dx.doi.org/10.1007/b138536">http://dx.doi.org/10.1007/b138536</a><br/>Format: Electronic Resources<br/>The Finite Element Method and Applications in Engineering Using Ansys®ent://SD_ILS/0/SD_ILS:5047602024-06-20T06:50:05Z2024-06-20T06:50:05Zby Madenci, Erdogan. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-28290-9">http://dx.doi.org/10.1007/978-0-387-28290-9</a><br/>Format: Electronic Resources<br/>Abstraction Refinement for Large Scale Model Checkingent://SD_ILS/0/SD_ILS:5053222024-06-20T06:50:05Z2024-06-20T06:50:05Zby Wang, Chao. author.<br/><a href="http://dx.doi.org/10.1007/0-387-34600-7">http://dx.doi.org/10.1007/0-387-34600-7</a><br/>Format: Electronic Resources<br/>The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500™ent://SD_ILS/0/SD_ILS:5053242024-06-20T06:50:05Z2024-06-20T06:50:05Zby Silva, Francisco. author.<br/><a href="http://dx.doi.org/10.1007/0-387-34609-0">http://dx.doi.org/10.1007/0-387-34609-0</a><br/>Format: Electronic Resources<br/>Hardware Verification with C++ A Practitioner’s Handbookent://SD_ILS/0/SD_ILS:5054122024-06-20T06:50:05Z2024-06-20T06:50:05Zby Mintz, Mike. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-36254-0">http://dx.doi.org/10.1007/978-0-387-36254-0</a><br/>Format: Electronic Resources<br/>Curves and Surfaces for Computer Graphicsent://SD_ILS/0/SD_ILS:5047842024-06-20T06:50:05Z2024-06-20T06:50:05Zby Salomon, David. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28452-4">http://dx.doi.org/10.1007/0-387-28452-4</a><br/>Format: Electronic Resources<br/>Interconnect Noise Optimization in Nanometer Technologiesent://SD_ILS/0/SD_ILS:5049062024-06-20T06:50:05Z2024-06-20T06:50:05Zby Elgamel, Mohamed A. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29366-3">http://dx.doi.org/10.1007/0-387-29366-3</a><br/>Format: Electronic Resources<br/>Boundary Representation Modelling Techniquesent://SD_ILS/0/SD_ILS:5086042024-06-20T06:50:05Z2024-06-20T06:50:05Zby Stroud, Ian. author.<br/><a href="http://dx.doi.org/10.1007/978-1-84628-616-2">http://dx.doi.org/10.1007/978-1-84628-616-2</a><br/>Format: Electronic Resources<br/>Computer Supported Cooperative Work in Design II 9th International Conference, CSCWD 2005, Coventry, UK, May 24-26, 2005, Revised Selected Papersent://SD_ILS/0/SD_ILS:5108052024-06-20T06:50:05Z2024-06-20T06:50:05Zby Shen, Wei-ming. editor.<br/><a href="http://dx.doi.org/10.1007/11686699">http://dx.doi.org/10.1007/11686699</a><br/>Format: Electronic Resources<br/>Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platformsent://SD_ILS/0/SD_ILS:5070292024-06-20T06:50:05Z2024-06-20T06:50:05Zby Kogel, Tim. author.<br/><a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format: Electronic Resources<br/>Design Computing and Cognition ’06ent://SD_ILS/0/SD_ILS:5071502024-06-20T06:50:05Z2024-06-20T06:50:05Zby GERO, JOHN S. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5131-9">http://dx.doi.org/10.1007/978-1-4020-5131-9</a><br/>Format: Electronic Resources<br/>A Roadmap for Formal Property Verificationent://SD_ILS/0/SD_ILS:5070052024-06-20T06:50:05Z2024-06-20T06:50:05Zby DasGupta, Pallab. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format: Electronic Resources<br/>Assembly Line Design The Balancing of Mixed-Model Hybrid Assembly Lines with Genetic Algorithmsent://SD_ILS/0/SD_ILS:5083702024-06-20T06:50:05Z2024-06-20T06:50:05Zby Rekiek, Brahim. author.<br/><a href="http://dx.doi.org/10.1007/b138846">http://dx.doi.org/10.1007/b138846</a><br/>Format: Electronic Resources<br/>Condition Monitoring and Control for Intelligent Manufacturingent://SD_ILS/0/SD_ILS:5084872024-06-20T06:50:05Z2024-06-20T06:50:05Zby Wang, Lihui. editor.<br/><a href="http://dx.doi.org/10.1007/1-84628-269-1">http://dx.doi.org/10.1007/1-84628-269-1</a><br/>Format: Electronic Resources<br/>The Structure of Paintingsent://SD_ILS/0/SD_ILS:5087722024-06-20T06:50:05Z2024-06-20T06:50:05Zby Leyton, Michael. author.<br/><a href="http://dx.doi.org/10.1007/978-3-211-35742-2">http://dx.doi.org/10.1007/978-3-211-35742-2</a><br/>Format: Electronic Resources<br/>Transformations and Projections in Computer Graphicsent://SD_ILS/0/SD_ILS:5086072024-06-20T06:50:05Z2024-06-20T06:50:05Zby Salomon, David. author.<br/><a href="http://dx.doi.org/10.1007/978-1-84628-620-9">http://dx.doi.org/10.1007/978-1-84628-620-9</a><br/>Format: Electronic Resources<br/>Practical Grey-box Process Identification Theory and Applicationsent://SD_ILS/0/SD_ILS:5085402024-06-20T06:50:05Z2024-06-20T06:50:05Zby Bohlin, Torsten. author.<br/><a href="http://dx.doi.org/10.1007/1-84628-403-1">http://dx.doi.org/10.1007/1-84628-403-1</a><br/>Format: Electronic Resources<br/>Adobe® Acrobat® and PDF for Architecture, Engineering, and Constructionent://SD_ILS/0/SD_ILS:5083932024-06-20T06:50:05Z2024-06-20T06:50:05Zby Carson, Tom. author.<br/><a href="http://dx.doi.org/10.1007/1-84628-138-5">http://dx.doi.org/10.1007/1-84628-138-5</a><br/>Format: Electronic Resources<br/>Large-Scale Scientific Computing 5th International Conference, LSSC 2005, Sozopol, Bulgaria, June 6-10, 2005. Revised Papersent://SD_ILS/0/SD_ILS:5103612024-06-20T06:50:05Z2024-06-20T06:50:05Zby Lirkov, Ivan. editor.<br/><a href="http://dx.doi.org/10.1007/11666806">http://dx.doi.org/10.1007/11666806</a><br/>Format: Electronic Resources<br/>Innovation in Life Cycle Engineering and Sustainable Developmentent://SD_ILS/0/SD_ILS:5069442024-06-20T06:50:05Z2024-06-20T06:50:05Zby Brissaud, Daniel. editor.<br/><a href="http://dx.doi.org/10.1007/1-4020-4617-0">http://dx.doi.org/10.1007/1-4020-4617-0</a><br/>Format: Electronic Resources<br/>Intelligent Computing in Engineering and Architecture 13th EG-ICE Workshop 2006, Ascona, Switzerland, June 25-30, 2006, Revised Selected Papersent://SD_ILS/0/SD_ILS:5117692024-06-20T06:50:05Z2024-06-20T06:50:05Zby Smith, Ian F. C. editor.<br/><a href="http://dx.doi.org/10.1007/11888598">http://dx.doi.org/10.1007/11888598</a><br/>Format: Electronic Resources<br/>Innovations in Design & Decision Support Systems in Architecture and Urban Planningent://SD_ILS/0/SD_ILS:5071202024-06-20T06:50:05Z2024-06-20T06:50:05Zby Leeuwen, Jos P. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5060-2">http://dx.doi.org/10.1007/978-1-4020-5060-2</a><br/>Format: Electronic Resources<br/>Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuitsent://SD_ILS/0/SD_ILS:5071542024-06-20T06:50:05Z2024-06-20T06:50:05Zby CASTRO-LÓPEZ, R. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5139-5">http://dx.doi.org/10.1007/978-1-4020-5139-5</a><br/>Format: Electronic Resources<br/>Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15–17, 2006, Shanghai, Chinaent://SD_ILS/0/SD_ILS:5053012024-06-20T06:50:05Z2024-06-20T06:50:05Zby Wang, Kesheng. editor.<br/><a href="http://dx.doi.org/10.1007/0-387-34403-9">http://dx.doi.org/10.1007/0-387-34403-9</a><br/>Format: Electronic Resources<br/>Feature Extraction Foundations and Applicationsent://SD_ILS/0/SD_ILS:5112902024-06-20T06:50:05Z2024-06-20T06:50:05Zby Guyon, Isabelle. editor.<br/><a href="http://dx.doi.org/10.1007/978-3-540-35488-8">http://dx.doi.org/10.1007/978-3-540-35488-8</a><br/>Format: Electronic Resources<br/>