Search Results for - Narrowed by: IYTE Library - 2006 - Computer aided design. SirsiDynix Enterprise https://catalog.iyte.edu.tr/client/en_US/default/default/qf$003dLIBRARY$002509Library$0025091$00253AIYTE$002509IYTE$002bLibrary$0026qf$003dPUBDATE$002509Publication$002bDate$0025092006$0025092006$0026qf$003dSUBJECT$002509Subject$002509Computer$002baided$002bdesign.$002509Computer$002baided$002bdesign.$0026ps$003d300? 2024-06-20T06:50:05Z Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity ent://SD_ILS/0/SD_ILS:504273 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Leventhal, Roy G. author.<br/><a href="http://dx.doi.org/10.1007/b104647">http://dx.doi.org/10.1007/b104647</a><br/>Format:&#160;Electronic Resources<br/> Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibility ent://SD_ILS/0/SD_ILS:504545 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Ben Dhia, Sonia. editor.<br/><a href="http://dx.doi.org/10.1007/b137864">http://dx.doi.org/10.1007/b137864</a><br/>Format:&#160;Electronic Resources<br/> Embedded System Design ent://SD_ILS/0/SD_ILS:504967 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Marwedel, Peter. author.<br/><a href="http://dx.doi.org/10.1007/0-387-30087-2">http://dx.doi.org/10.1007/0-387-30087-2</a><br/>Format:&#160;Electronic Resources<br/> Leakage in Nanometer CMOS Technologies ent://SD_ILS/0/SD_ILS:504737 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Narendra, Siva G. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28133-9">http://dx.doi.org/10.1007/0-387-28133-9</a><br/>Format:&#160;Electronic Resources<br/> Rapid Prototyping of Digital Systems ent://SD_ILS/0/SD_ILS:504855 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Hamblen, James O. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28965-8">http://dx.doi.org/10.1007/0-387-28965-8</a><br/>Format:&#160;Electronic Resources<br/> SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling ent://SD_ILS/0/SD_ILS:505424 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Sutherland, Stuart. author.<br/><a href="http://dx.doi.org/10.1007/0-387-36495-1">http://dx.doi.org/10.1007/0-387-36495-1</a><br/>Format:&#160;Electronic Resources<br/> Verification Methodology Manual for SystemVerilog ent://SD_ILS/0/SD_ILS:504411 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Bergeron, Janick. author.<br/><a href="http://dx.doi.org/10.1007/b135575">http://dx.doi.org/10.1007/b135575</a><br/>Format:&#160;Electronic Resources<br/> Thermal and Power Management of Integrated Circuits ent://SD_ILS/0/SD_ILS:504942 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Vassighi, Arman. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29749-9">http://dx.doi.org/10.1007/0-387-29749-9</a><br/>Format:&#160;Electronic Resources<br/> Scalable Hardware Verification with Symbolic Simulation ent://SD_ILS/0/SD_ILS:504957 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Bertacco, Valeria. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29906-8">http://dx.doi.org/10.1007/0-387-29906-8</a><br/>Format:&#160;Electronic Resources<br/> Constraint-Based Verification ent://SD_ILS/0/SD_ILS:505026 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Yuan, Jun. author.<br/><a href="http://dx.doi.org/10.1007/0-387-30784-2">http://dx.doi.org/10.1007/0-387-30784-2</a><br/>Format:&#160;Electronic Resources<br/> Writing Testbenches using System Verilog ent://SD_ILS/0/SD_ILS:505075 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Bergeron, Janick. author.<br/><a href="http://dx.doi.org/10.1007/0-387-31275-7">http://dx.doi.org/10.1007/0-387-31275-7</a><br/>Format:&#160;Electronic Resources<br/> Systemverilog for Verification A Guide to Learning the Testbench Language Features ent://SD_ILS/0/SD_ILS:504571 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Spear, Chris. author.<br/><a href="http://dx.doi.org/10.1007/b138536">http://dx.doi.org/10.1007/b138536</a><br/>Format:&#160;Electronic Resources<br/> The Finite Element Method and Applications in Engineering Using Ansys&reg; ent://SD_ILS/0/SD_ILS:504760 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Madenci, Erdogan. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-28290-9">http://dx.doi.org/10.1007/978-0-387-28290-9</a><br/>Format:&#160;Electronic Resources<br/> Abstraction Refinement for Large Scale Model Checking ent://SD_ILS/0/SD_ILS:505322 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Wang, Chao. author.<br/><a href="http://dx.doi.org/10.1007/0-387-34600-7">http://dx.doi.org/10.1007/0-387-34600-7</a><br/>Format:&#160;Electronic Resources<br/> The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500&trade; ent://SD_ILS/0/SD_ILS:505324 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Silva, Francisco. author.<br/><a href="http://dx.doi.org/10.1007/0-387-34609-0">http://dx.doi.org/10.1007/0-387-34609-0</a><br/>Format:&#160;Electronic Resources<br/> Hardware Verification with C++ A Practitioner&rsquo;s Handbook ent://SD_ILS/0/SD_ILS:505412 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Mintz, Mike. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-36254-0">http://dx.doi.org/10.1007/978-0-387-36254-0</a><br/>Format:&#160;Electronic Resources<br/> Curves and Surfaces for Computer Graphics ent://SD_ILS/0/SD_ILS:504784 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Salomon, David. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28452-4">http://dx.doi.org/10.1007/0-387-28452-4</a><br/>Format:&#160;Electronic Resources<br/> Interconnect Noise Optimization in Nanometer Technologies ent://SD_ILS/0/SD_ILS:504906 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Elgamel, Mohamed A. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29366-3">http://dx.doi.org/10.1007/0-387-29366-3</a><br/>Format:&#160;Electronic Resources<br/> Boundary Representation Modelling Techniques ent://SD_ILS/0/SD_ILS:508604 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Stroud, Ian. author.<br/><a href="http://dx.doi.org/10.1007/978-1-84628-616-2">http://dx.doi.org/10.1007/978-1-84628-616-2</a><br/>Format:&#160;Electronic Resources<br/> Computer Supported Cooperative Work in Design II 9th International Conference, CSCWD 2005, Coventry, UK, May 24-26, 2005, Revised Selected Papers ent://SD_ILS/0/SD_ILS:510805 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Shen, Wei-ming. editor.<br/><a href="http://dx.doi.org/10.1007/11686699">http://dx.doi.org/10.1007/11686699</a><br/>Format:&#160;Electronic Resources<br/> Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms ent://SD_ILS/0/SD_ILS:507029 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Kogel, Tim. author.<br/><a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format:&#160;Electronic Resources<br/> Design Computing and Cognition &rsquo;06 ent://SD_ILS/0/SD_ILS:507150 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;GERO, JOHN S. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5131-9">http://dx.doi.org/10.1007/978-1-4020-5131-9</a><br/>Format:&#160;Electronic Resources<br/> A Roadmap for Formal Property Verification ent://SD_ILS/0/SD_ILS:507005 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;DasGupta, Pallab. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format:&#160;Electronic Resources<br/> Assembly Line Design The Balancing of Mixed-Model Hybrid Assembly Lines with Genetic Algorithms ent://SD_ILS/0/SD_ILS:508370 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Rekiek, Brahim. author.<br/><a href="http://dx.doi.org/10.1007/b138846">http://dx.doi.org/10.1007/b138846</a><br/>Format:&#160;Electronic Resources<br/> Condition Monitoring and Control for Intelligent Manufacturing ent://SD_ILS/0/SD_ILS:508487 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Wang, Lihui. editor.<br/><a href="http://dx.doi.org/10.1007/1-84628-269-1">http://dx.doi.org/10.1007/1-84628-269-1</a><br/>Format:&#160;Electronic Resources<br/> The Structure of Paintings ent://SD_ILS/0/SD_ILS:508772 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Leyton, Michael. author.<br/><a href="http://dx.doi.org/10.1007/978-3-211-35742-2">http://dx.doi.org/10.1007/978-3-211-35742-2</a><br/>Format:&#160;Electronic Resources<br/> Transformations and Projections in Computer Graphics ent://SD_ILS/0/SD_ILS:508607 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Salomon, David. author.<br/><a href="http://dx.doi.org/10.1007/978-1-84628-620-9">http://dx.doi.org/10.1007/978-1-84628-620-9</a><br/>Format:&#160;Electronic Resources<br/> Practical Grey-box Process Identification Theory and Applications ent://SD_ILS/0/SD_ILS:508540 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Bohlin, Torsten. author.<br/><a href="http://dx.doi.org/10.1007/1-84628-403-1">http://dx.doi.org/10.1007/1-84628-403-1</a><br/>Format:&#160;Electronic Resources<br/> Adobe&reg; Acrobat&reg; and PDF for Architecture, Engineering, and Construction ent://SD_ILS/0/SD_ILS:508393 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Carson, Tom. author.<br/><a href="http://dx.doi.org/10.1007/1-84628-138-5">http://dx.doi.org/10.1007/1-84628-138-5</a><br/>Format:&#160;Electronic Resources<br/> Large-Scale Scientific Computing 5th International Conference, LSSC 2005, Sozopol, Bulgaria, June 6-10, 2005. Revised Papers ent://SD_ILS/0/SD_ILS:510361 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Lirkov, Ivan. editor.<br/><a href="http://dx.doi.org/10.1007/11666806">http://dx.doi.org/10.1007/11666806</a><br/>Format:&#160;Electronic Resources<br/> Innovation in Life Cycle Engineering and Sustainable Development ent://SD_ILS/0/SD_ILS:506944 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Brissaud, Daniel. editor.<br/><a href="http://dx.doi.org/10.1007/1-4020-4617-0">http://dx.doi.org/10.1007/1-4020-4617-0</a><br/>Format:&#160;Electronic Resources<br/> Intelligent Computing in Engineering and Architecture 13th EG-ICE Workshop 2006, Ascona, Switzerland, June 25-30, 2006, Revised Selected Papers ent://SD_ILS/0/SD_ILS:511769 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Smith, Ian F. C. editor.<br/><a href="http://dx.doi.org/10.1007/11888598">http://dx.doi.org/10.1007/11888598</a><br/>Format:&#160;Electronic Resources<br/> Innovations in Design &amp; Decision Support Systems in Architecture and Urban Planning ent://SD_ILS/0/SD_ILS:507120 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Leeuwen, Jos P. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5060-2">http://dx.doi.org/10.1007/978-1-4020-5060-2</a><br/>Format:&#160;Electronic Resources<br/> Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits ent://SD_ILS/0/SD_ILS:507154 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;CASTRO-L&Oacute;PEZ, R. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5139-5">http://dx.doi.org/10.1007/978-1-4020-5139-5</a><br/>Format:&#160;Electronic Resources<br/> Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15&ndash;17, 2006, Shanghai, China ent://SD_ILS/0/SD_ILS:505301 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Wang, Kesheng. editor.<br/><a href="http://dx.doi.org/10.1007/0-387-34403-9">http://dx.doi.org/10.1007/0-387-34403-9</a><br/>Format:&#160;Electronic Resources<br/> Feature Extraction Foundations and Applications ent://SD_ILS/0/SD_ILS:511290 2024-06-20T06:50:05Z 2024-06-20T06:50:05Z by&#160;Guyon, Isabelle. editor.<br/><a href="http://dx.doi.org/10.1007/978-3-540-35488-8">http://dx.doi.org/10.1007/978-3-540-35488-8</a><br/>Format:&#160;Electronic Resources<br/>