Search Results for - Narrowed by: Mathematical Logic and Formal Languages. - Systems engineering.SirsiDynix Enterprisehttps://catalog.iyte.edu.tr/client/en_US/default/default/qf$003dSUBJECT$002509Subject$002509Mathematical$002bLogic$002band$002bFormal$002bLanguages.$002509Mathematical$002bLogic$002band$002bFormal$002bLanguages.$0026qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026ps$003d300$0026isd$003dtrue?2024-06-21T12:31:15ZIngredients for Successful System Level Design Methodologyent://SD_ILS/0/SD_ILS:5022772024-06-21T12:31:15Z2024-06-21T12:31:15Zby Patel, Hiren D. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-8472-0">http://dx.doi.org/10.1007/978-1-4020-8472-0</a><br/>Format: Electronic Resources<br/>Robustness and Usability in Modern Design Flowsent://SD_ILS/0/SD_ILS:5020912024-06-21T12:31:15Z2024-06-21T12:31:15Zby Fey, Görschwin. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-6536-1">http://dx.doi.org/10.1007/978-1-4020-6536-1</a><br/>Format: Electronic Resources<br/>A Roadmap for Formal Property Verificationent://SD_ILS/0/SD_ILS:5070052024-06-21T12:31:15Z2024-06-21T12:31:15Zby DasGupta, Pallab. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format: Electronic Resources<br/>Computation Engineering Applied Automata Theory and Logicent://SD_ILS/0/SD_ILS:5051272024-06-21T12:31:15Z2024-06-21T12:31:15Zby Gopalakrishnan, Ganesh. author.<br/><a href="http://dx.doi.org/10.1007/0-387-32520-4">http://dx.doi.org/10.1007/0-387-32520-4</a><br/>Format: Electronic Resources<br/>Reconfigurable Computing Accelerating Computation with Field-Programmable Gate Arraysent://SD_ILS/0/SD_ILS:5044842024-06-21T12:31:15Z2024-06-21T12:31:15Zby Gokhale, Maya. author.<br/><a href="http://dx.doi.org/10.1007/b136834">http://dx.doi.org/10.1007/b136834</a><br/>Format: Electronic Resources<br/>