Search Results for - Narrowed by: Software engineering. - Leupers, Rainer. author.
SirsiDynix Enterprise
https://catalog.iyte.edu.tr/client/en_US/default/default/qf$003dSUBJECT$002509Subject$002509Software$002bengineering.$002509Software$002bengineering.$0026qf$003dAUTHOR$002509Author$002509Leupers$00252C$002bRainer.$002bauthor.$002509Leupers$00252C$002bRainer.$002bauthor.$0026ps$003d300?
2024-05-29T14:50:58Z
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
ent://SD_ILS/0/SD_ILS:502324
2024-05-29T14:50:58Z
2024-05-29T14:50:58Z
by Wieferink, Andreas. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-8652-6">http://dx.doi.org/10.1007/978-1-4020-8652-6</a><br/>Format: Electronic Resources<br/>
Optimized ASIP Synthesis from Architecture Description Language Models
ent://SD_ILS/0/SD_ILS:507377
2024-05-29T14:50:58Z
2024-05-29T14:50:58Z
by Schliebusch, Oliver. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5686-4">http://dx.doi.org/10.1007/978-1-4020-5686-4</a><br/>Format: Electronic Resources<br/>
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
ent://SD_ILS/0/SD_ILS:507029
2024-05-29T14:50:58Z
2024-05-29T14:50:58Z
by Kogel, Tim. author.<br/><a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format: Electronic Resources<br/>