Search Results for - Narrowed by: Systems engineering. - Computer aided design. SirsiDynix Enterprise https://catalog.iyte.edu.tr/client/en_US/default/default/qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026qf$003dSUBJECT$002509Subject$002509Computer$002baided$002bdesign.$002509Computer$002baided$002bdesign.$0026ps$003d300? 2024-05-30T00:01:51Z Millimeter-Wave Low Noise Amplifiers ent://SD_ILS/0/SD_ILS:2086810 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Božanić, Mladen. author.<br/><a href="https://doi.org/10.1007/978-3-319-69020-9">https://doi.org/10.1007/978-3-319-69020-9</a><br/>Format:&#160;Electronic Resources<br/> VLSI-SoC: Design for Reliability, Security, and Low Power 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, Korea, October 5-7, 2015, Revised Selected Papers ent://SD_ILS/0/SD_ILS:2084766 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Shin, Youngsoo. editor.<br/><a href="https://doi.org/10.1007/978-3-319-46097-0">https://doi.org/10.1007/978-3-319-46097-0</a><br/>Format:&#160;Electronic Resources<br/> Power Amplifiers for the S-, C-, X- and Ku-bands An EDA Perspective ent://SD_ILS/0/SD_ILS:2087736 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Božanić, Mladen. author.<br/><a href="https://doi.org/10.1007/978-3-319-28376-0">https://doi.org/10.1007/978-3-319-28376-0</a><br/>Format:&#160;Electronic Resources<br/> System Verilog for Verification A Guide to Learning the Testbench Language Features ent://SD_ILS/0/SD_ILS:501876 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Spear, Chris. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-76530-3">http://dx.doi.org/10.1007/978-0-387-76530-3</a><br/>Format:&#160;Electronic Resources<br/> Low-Power High-Level Synthesis for Nanoscale CMOS Circuits ent://SD_ILS/0/SD_ILS:501870 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Patra, Priyardarsan. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-76474-0">http://dx.doi.org/10.1007/978-0-387-76474-0</a><br/>Format:&#160;Electronic Resources<br/> CMOS Active Inductors and Transformers Principle, Implementation, and Applications ent://SD_ILS/0/SD_ILS:501872 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Yuan, Fei. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-76479-5">http://dx.doi.org/10.1007/978-0-387-76479-5</a><br/>Format:&#160;Electronic Resources<br/> Nanometer Technology Designs High-Quality Delay Tests ent://SD_ILS/0/SD_ILS:501845 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Tehranipoor, Mohammad. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-75728-5">http://dx.doi.org/10.1007/978-0-387-75728-5</a><br/>Format:&#160;Electronic Resources<br/> Functional Verification Coverage Measurement and Analysis ent://SD_ILS/0/SD_ILS:502202 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Piziali, Andrew. author.<br/><a href="http://dx.doi.org/10.1007/b117979">http://dx.doi.org/10.1007/b117979</a><br/>Format:&#160;Electronic Resources<br/> Rapid Prototyping of Digital Systems ent://SD_ILS/0/SD_ILS:501709 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Hamblen, James O. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-72671-7">http://dx.doi.org/10.1007/978-0-387-72671-7</a><br/>Format:&#160;Electronic Resources<br/> Power Distribution Networks with On-Chip Decoupling Capacitors ent://SD_ILS/0/SD_ILS:501673 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Popovich, Mikhhail. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-71601-5">http://dx.doi.org/10.1007/978-0-387-71601-5</a><br/>Format:&#160;Electronic Resources<br/> Creating Assertion-Based IP ent://SD_ILS/0/SD_ILS:501609 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Foster, Harry D. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-68398-0">http://dx.doi.org/10.1007/978-0-387-68398-0</a><br/>Format:&#160;Electronic Resources<br/> Design for Manufacturability and Statistical Design A Constructive Approach ent://SD_ILS/0/SD_ILS:501640 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Orshansky, Michael. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-69011-7">http://dx.doi.org/10.1007/978-0-387-69011-7</a><br/>Format:&#160;Electronic Resources<br/> Standardized Functional Verification ent://SD_ILS/0/SD_ILS:501675 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Wiemann, Alan. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-71733-3">http://dx.doi.org/10.1007/978-0-387-71733-3</a><br/>Format:&#160;Electronic Resources<br/> Inverse Problems in Electric Circuits and Electromagnetics ent://SD_ILS/0/SD_ILS:505597 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Chechurin, V. L. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-46047-5">http://dx.doi.org/10.1007/978-0-387-46047-5</a><br/>Format:&#160;Electronic Resources<br/> Routing Congestion in VLSI Circuits: Estimation and Optimization ent://SD_ILS/0/SD_ILS:505677 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Saxena, Prashant. author.<br/><a href="http://dx.doi.org/10.1007/0-387-48550-3">http://dx.doi.org/10.1007/0-387-48550-3</a><br/>Format:&#160;Electronic Resources<br/> Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them ent://SD_ILS/0/SD_ILS:505970 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Sutherland, Stuart. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-71715-9">http://dx.doi.org/10.1007/978-0-387-71715-9</a><br/>Format:&#160;Electronic Resources<br/> Hardware Verification with SystemVerilog An Object-Oriented Framework ent://SD_ILS/0/SD_ILS:505975 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Mintz, Mike. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-71740-1">http://dx.doi.org/10.1007/978-0-387-71740-1</a><br/>Format:&#160;Electronic Resources<br/> Global Specification and Validation of Embedded Systems Integrating Heterogeneous Components ent://SD_ILS/0/SD_ILS:507554 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Nicolescu, G. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-6153-0">http://dx.doi.org/10.1007/978-1-4020-6153-0</a><br/>Format:&#160;Electronic Resources<br/> Full-Chip Nanometer Routing Techniques ent://SD_ILS/0/SD_ILS:507567 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Ho, Tsung-Yi. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-6195-0">http://dx.doi.org/10.1007/978-1-4020-6195-0</a><br/>Format:&#160;Electronic Resources<br/> Dynamics of Microelectromechanical Systems ent://SD_ILS/0/SD_ILS:505785 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Lobontiu, Nicolae. author.<br/><a href="http://dx.doi.org/10.1007/978-0-387-68195-5">http://dx.doi.org/10.1007/978-0-387-68195-5</a><br/>Format:&#160;Electronic Resources<br/> Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogeneous Platforms ent://SD_ILS/0/SD_ILS:507623 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Ma, Zhe. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-6344-2">http://dx.doi.org/10.1007/978-1-4020-6344-2</a><br/>Format:&#160;Electronic Resources<br/> Design for Manufacturability and Yield for Nano-Scale CMOS ent://SD_ILS/0/SD_ILS:507174 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Chiang, Charles C. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5188-3">http://dx.doi.org/10.1007/978-1-4020-5188-3</a><br/>Format:&#160;Electronic Resources<br/> CMOS Current-Mode Circuits for Data Communications ent://SD_ILS/0/SD_ILS:505653 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Yuan, Fei. author.<br/><a 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href="http://dx.doi.org/10.1007/b135575">http://dx.doi.org/10.1007/b135575</a><br/>Format:&#160;Electronic Resources<br/> Semiconductor Modeling For Simulating Signal, Power, and Electromagnetic Integrity ent://SD_ILS/0/SD_ILS:504273 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Leventhal, Roy G. author.<br/><a href="http://dx.doi.org/10.1007/b104647">http://dx.doi.org/10.1007/b104647</a><br/>Format:&#160;Electronic Resources<br/> Abstraction Refinement for Large Scale Model Checking ent://SD_ILS/0/SD_ILS:505322 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Wang, Chao. author.<br/><a href="http://dx.doi.org/10.1007/0-387-34600-7">http://dx.doi.org/10.1007/0-387-34600-7</a><br/>Format:&#160;Electronic Resources<br/> The Core Test Wrapper Handbook Rationale and Application of IEEE Std. 1500&trade; ent://SD_ILS/0/SD_ILS:505324 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Silva, Francisco. author.<br/><a href="http://dx.doi.org/10.1007/0-387-34609-0">http://dx.doi.org/10.1007/0-387-34609-0</a><br/>Format:&#160;Electronic Resources<br/> SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling ent://SD_ILS/0/SD_ILS:505424 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Sutherland, Stuart. author.<br/><a href="http://dx.doi.org/10.1007/0-387-36495-1">http://dx.doi.org/10.1007/0-387-36495-1</a><br/>Format:&#160;Electronic Resources<br/> Interconnect Noise Optimization in Nanometer Technologies ent://SD_ILS/0/SD_ILS:504906 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Elgamel, Mohamed A. author.<br/><a href="http://dx.doi.org/10.1007/0-387-29366-3">http://dx.doi.org/10.1007/0-387-29366-3</a><br/>Format:&#160;Electronic Resources<br/> Writing Testbenches using System Verilog ent://SD_ILS/0/SD_ILS:505075 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Bergeron, Janick. author.<br/><a href="http://dx.doi.org/10.1007/0-387-31275-7">http://dx.doi.org/10.1007/0-387-31275-7</a><br/>Format:&#160;Electronic Resources<br/> Systemverilog for Verification A Guide to Learning the Testbench Language Features ent://SD_ILS/0/SD_ILS:504571 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Spear, Chris. author.<br/><a href="http://dx.doi.org/10.1007/b138536">http://dx.doi.org/10.1007/b138536</a><br/>Format:&#160;Electronic Resources<br/> Rapid Prototyping of Digital Systems ent://SD_ILS/0/SD_ILS:504855 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Hamblen, James O. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28965-8">http://dx.doi.org/10.1007/0-387-28965-8</a><br/>Format:&#160;Electronic Resources<br/> Electromagnetic Compatibility of Integrated Circuits Techniques for low emission and susceptibility ent://SD_ILS/0/SD_ILS:504545 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Ben Dhia, Sonia. editor.<br/><a href="http://dx.doi.org/10.1007/b137864">http://dx.doi.org/10.1007/b137864</a><br/>Format:&#160;Electronic Resources<br/> Constraint-Based Verification ent://SD_ILS/0/SD_ILS:505026 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Yuan, Jun. author.<br/><a href="http://dx.doi.org/10.1007/0-387-30784-2">http://dx.doi.org/10.1007/0-387-30784-2</a><br/>Format:&#160;Electronic Resources<br/> Leakage in Nanometer CMOS Technologies ent://SD_ILS/0/SD_ILS:504737 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Narendra, Siva G. author.<br/><a href="http://dx.doi.org/10.1007/0-387-28133-9">http://dx.doi.org/10.1007/0-387-28133-9</a><br/>Format:&#160;Electronic Resources<br/> Embedded System Design ent://SD_ILS/0/SD_ILS:504967 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Marwedel, Peter. author.<br/><a href="http://dx.doi.org/10.1007/0-387-30087-2">http://dx.doi.org/10.1007/0-387-30087-2</a><br/>Format:&#160;Electronic Resources<br/> Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms ent://SD_ILS/0/SD_ILS:507029 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Kogel, Tim. author.<br/><a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format:&#160;Electronic Resources<br/> Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits ent://SD_ILS/0/SD_ILS:507154 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;CASTRO-L&Oacute;PEZ, R. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5139-5">http://dx.doi.org/10.1007/978-1-4020-5139-5</a><br/>Format:&#160;Electronic Resources<br/> A Roadmap for Formal Property Verification ent://SD_ILS/0/SD_ILS:507005 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;DasGupta, Pallab. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format:&#160;Electronic Resources<br/> Hardware Verification with C++ A Practitioner&rsquo;s Handbook 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by&#160;Bailey, Brian. editor.<br/><a href="http://dx.doi.org/10.1007/b104217">http://dx.doi.org/10.1007/b104217</a><br/>Format:&#160;Electronic Resources<br/> Mixed-Signal Layout Generation Concepts ent://SD_ILS/0/SD_ILS:504047 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Lin, Chieh. author.<br/><a href="http://dx.doi.org/10.1007/b106472">http://dx.doi.org/10.1007/b106472</a><br/>Format:&#160;Electronic Resources<br/> Advances in Design and Specification Languages for SoCs Selected Contributions from FDL&rsquo;04 ent://SD_ILS/0/SD_ILS:504494 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Boulet, Pierre. editor.<br/><a href="http://dx.doi.org/10.1007/b136935">http://dx.doi.org/10.1007/b136935</a><br/>Format:&#160;Electronic Resources<br/> Digital Design and Implementation with Field Programmable Devices ent://SD_ILS/0/SD_ILS:507690 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Navabi, Zainalabedin. author.<br/><a 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Resources<br/> Interconnect-Centric Design for Advanced SoC and NoC ent://SD_ILS/0/SD_ILS:507683 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Nurmi, Jari. editor.<br/><a href="http://dx.doi.org/10.1007/b117241">http://dx.doi.org/10.1007/b117241</a><br/>Format:&#160;Electronic Resources<br/> Functional Verification of Programmable Embedded Architectures A Top-Down Approach ent://SD_ILS/0/SD_ILS:504534 2024-05-30T00:01:51Z 2024-05-30T00:01:51Z by&#160;Mishra, Prabhat. author.<br/><a href="http://dx.doi.org/10.1007/b137514">http://dx.doi.org/10.1007/b137514</a><br/>Format:&#160;Electronic Resources<br/>