Search Results for - Narrowed by: Systems engineering. - Special Purpose and Application-Based Systems. SirsiDynix Enterprise https://catalog.iyte.edu.tr/client/en_US/default/default/qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026qf$003dSUBJECT$002509Subject$002509Special$002bPurpose$002band$002bApplication-Based$002bSystems.$002509Special$002bPurpose$002band$002bApplication-Based$002bSystems.$0026ps$003d300? 2024-05-20T11:53:00Z Embedded Systems Specification and Design Languages Selected contributions from FDL&rsquo;07 ent://SD_ILS/0/SD_ILS:502237 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Villar, Eugenio. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-8297-9">http://dx.doi.org/10.1007/978-1-4020-8297-9</a><br/>Format:&#160;Electronic Resources<br/> Ingredients for Successful System Level Design Methodology ent://SD_ILS/0/SD_ILS:502277 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Patel, Hiren D. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-8472-0">http://dx.doi.org/10.1007/978-1-4020-8472-0</a><br/>Format:&#160;Electronic Resources<br/> Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms ent://SD_ILS/0/SD_ILS:502324 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Wieferink, Andreas. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-8652-6">http://dx.doi.org/10.1007/978-1-4020-8652-6</a><br/>Format:&#160;Electronic Resources<br/> Advanced Memory Optimization Techniques for Low-Power Embedded Processors ent://SD_ILS/0/SD_ILS:507452 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Verma, Manish. author.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5897-4">http://dx.doi.org/10.1007/978-1-4020-5897-4</a><br/>Format:&#160;Electronic Resources<br/> Global Specification and Validation of Embedded Systems Integrating Heterogeneous Components ent://SD_ILS/0/SD_ILS:507554 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Nicolescu, G. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-6153-0">http://dx.doi.org/10.1007/978-1-4020-6153-0</a><br/>Format:&#160;Electronic Resources<br/> Processor Design System-on-Chip Computing for ASICs and FPGAs ent://SD_ILS/0/SD_ILS:507310 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Nurmi, Jari. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5530-0">http://dx.doi.org/10.1007/978-1-4020-5530-0</a><br/>Format:&#160;Electronic Resources<br/> Designing Embedded Processors A Low Power Perspective ent://SD_ILS/0/SD_ILS:507441 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Henkel, J&ouml;rg. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-5869-1">http://dx.doi.org/10.1007/978-1-4020-5869-1</a><br/>Format:&#160;Electronic Resources<br/> Advances in Design and Specification Languages for Embedded Systems Selected Contributions from FDL'06 ent://SD_ILS/0/SD_ILS:507552 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Huss, Sorin A. editor.<br/><a href="http://dx.doi.org/10.1007/978-1-4020-6149-3">http://dx.doi.org/10.1007/978-1-4020-6149-3</a><br/>Format:&#160;Electronic Resources<br/> Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms ent://SD_ILS/0/SD_ILS:507029 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Kogel, Tim. author.<br/><a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format:&#160;Electronic Resources<br/> Platform Based Design at the Electronic System Level Industry Perspectives and Experiences ent://SD_ILS/0/SD_ILS:507153 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Burton, Mark. author.<br/><a href="http://dx.doi.org/10.1007/1-4020-5138-7">http://dx.doi.org/10.1007/1-4020-5138-7</a><br/>Format:&#160;Electronic Resources<br/> FPGA Implementations of Neural Networks ent://SD_ILS/0/SD_ILS:504787 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Omondi, Amos R. editor.<br/><a href="http://dx.doi.org/10.1007/0-387-28487-7">http://dx.doi.org/10.1007/0-387-28487-7</a><br/>Format:&#160;Electronic Resources<br/> Functional Verification of Programmable Embedded Architectures A Top-Down Approach ent://SD_ILS/0/SD_ILS:504534 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Mishra, Prabhat. author.<br/><a href="http://dx.doi.org/10.1007/b137514">http://dx.doi.org/10.1007/b137514</a><br/>Format:&#160;Electronic Resources<br/> Advances in Design and Specification Languages for SoCs Selected Contributions from FDL&rsquo;04 ent://SD_ILS/0/SD_ILS:504494 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Boulet, Pierre. editor.<br/><a href="http://dx.doi.org/10.1007/b136935">http://dx.doi.org/10.1007/b136935</a><br/>Format:&#160;Electronic Resources<br/> UML for SOC Design ent://SD_ILS/0/SD_ILS:504435 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Martin, Grant. editor.<br/><a href="http://dx.doi.org/10.1007/b135980">http://dx.doi.org/10.1007/b135980</a><br/>Format:&#160;Electronic Resources<br/> System Level Design of Reconfigurable Systems-on-Chip ent://SD_ILS/0/SD_ILS:504483 2024-05-20T11:53:00Z 2024-05-20T11:53:00Z by&#160;Voros, Nikolaos S. editor.<br/><a href="http://dx.doi.org/10.1007/b136832">http://dx.doi.org/10.1007/b136832</a><br/>Format:&#160;Electronic Resources<br/>